Experimental 2.4MHz Mode A/C demodulator.
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294
demod_2400.c
294
demod_2400.c
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@ -470,3 +470,297 @@ void demodulate2400(struct mag_buf *mag)
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}
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}
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//////////
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////////// MODE A/C
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//////////
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// Mode A/C bits are 1.45us wide, consisting of 0.45us on and 1.0us off
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// We track this in terms of a (virtual) 60MHz clock, which is the lowest common multiple
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// of the bit frequency and the 2.4MHz sampling frequency
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//
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// 0.45us = 27 cycles }
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// 1.00us = 60 cycles } one bit period = 1.45us = 87 cycles
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//
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// one 2.4MHz sample = 25 cycles
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void demodulate2400AC(struct mag_buf *mag)
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{
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struct modesMessage mm;
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uint16_t *m = mag->data;
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uint32_t mlen = mag->length;
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unsigned f1_sample;
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memset(&mm, 0, sizeof(mm));
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for (f1_sample = 1; f1_sample < mlen; ++f1_sample) {
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// Mode A/C messages should match this bit sequence:
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// bit # value
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// -1 0 quiet zone
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// 0 1 framing pulse (F1)
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// 1 C1
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// 2 A1
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// 3 C2
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// 4 A2
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// 5 C4
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// 6 A4
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// 7 0 quiet zone (X1)
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// 8 B1
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// 9 D1
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// 10 B2
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// 11 D2
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// 12 B4
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// 13 D4
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// 14 1 framing pulse (F2)
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// 15 0 quiet zone (X2)
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// 16 0 quiet zone (X3)
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// 17 SPI
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// 18 0 quiet zone (X4)
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// 19 0 quiet zone (X5)
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// 20 0 quiet zone (X6)
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// 21 0 quiet zone (X7)
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// 22 0 quiet zone (X8)
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// 23 0 quiet zone (X9)
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// Look for a F1 and F2 pair,
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// with F1 starting at offset f1_sample.
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// the first framing pulse covers 3.5 samples:
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//
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// |----| |----|
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// | F1 |________| C1 |_
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//
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// | 0 | 1 | 2 | 3 | 4 |
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//
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// and there is some unknown phase offset of the
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// leading edge e.g.:
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//
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// |----| |----|
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// __| F1 |________| C1 |_
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//
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// | 0 | 1 | 2 | 3 | 4 |
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//
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// in theory the "on" period can straddle 3 samples
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// but it's not a big deal as at most 4% of the power
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// is in the third sample.
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if (!(m[f1_sample-1] < m[f1_sample+0]))
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continue; // not a rising edge
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if (m[f1_sample+2] > m[f1_sample+0] || m[f1_sample+2] > m[f1_sample+1])
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continue; // quiet part of bit wasn't sufficiently quiet
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unsigned f1_noise = (m[f1_sample-1] + m[f1_sample+2]) / 2;
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unsigned f1_signal = (m[f1_sample+0] + m[f1_sample+1]) / 2;
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if (f1_noise * 4 > f1_signal) {
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// require 12dB SNR
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continue;
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}
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// estimate initial clock phase based on the amount of power
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// that ended up in the second sample
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unsigned f1_clock = 25 * f1_sample;
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if (m[f1_sample+1] > f1_noise) {
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f1_clock += 25 * (m[f1_sample+1] - f1_noise) / (2*(f1_signal - f1_noise));
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}
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// same again for F2
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// F2 is 20.3us / 14 bit periods after F1
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unsigned f2_clock = f1_clock + (87 * 14);
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unsigned f2_sample = f2_clock / 25;
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if (!(m[f2_sample-1] < m[f2_sample+0]))
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continue;
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if (m[f2_sample+2] > m[f2_sample+0] || m[f2_sample+2] > m[f2_sample+1])
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continue; // quiet part of bit wasn't sufficiently quiet
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unsigned f2_noise = (m[f2_sample-1] + m[f2_sample+2]) / 2;
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unsigned f2_signal = (m[f2_sample+0] + m[f2_sample+1]) / 2;
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if (f2_noise * 4 > f2_signal) {
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// require 12dB SNR
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continue;
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}
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unsigned f1f2_signal = (f1_signal + f2_signal) / 2;
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// look at X1, X2, X3 which should be quiet
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// (sample 0 may have part of the previous bit, but
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// it always covers the quiet part of it)
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unsigned x1_clock = f1_clock + (87 * 7);
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unsigned x1_sample = x1_clock / 25;
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unsigned x1_noise = (m[x1_sample + 0] + m[x1_sample + 1] + m[x1_sample + 2]) / 3;
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if (x1_noise * 4 >= f1f2_signal)
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continue;
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unsigned x2_clock = f1_clock + (87 * 15);
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unsigned x2_sample = x2_clock / 25;
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unsigned x2_noise = (m[x2_sample + 0] + m[x2_sample + 1] + m[x2_sample + 2]) / 3;
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if (x2_noise * 4 >= f1f2_signal)
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continue;
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unsigned x3_clock = f1_clock + (87 * 16);
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unsigned x3_sample = x3_clock / 25;
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unsigned x3_noise = (m[x3_sample + 0] + m[x3_sample + 1] + m[x3_sample + 2]) / 3;
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if (x3_noise * 4 >= f1f2_signal)
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continue;
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unsigned x1x2x3_noise = (x1_noise + x2_noise + x3_noise) / 3;
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if (x1x2x3_noise * 4 >= f1f2_signal) // require 12dB separation
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continue;
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// ----- F1/F2 average signal
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// ^
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// | at least 3dB
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// v
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// ----- minimum signal level we accept as "on"
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// ^
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// | 3dB
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// v
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// ---- midpoint between F1/F2 and X1/X2/X3
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// ^
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// | 3dB
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// v
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// ----- maximum signal level we accept as "off"
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// ^
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// | at least 3dB
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// v
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// ----- X1/X2/X3 average noise
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float midpoint = sqrtf(x1x2x3_noise * f1f2_signal); // so that signal/midpoint == midpoint/noise
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unsigned noise_threshold = (unsigned) (midpoint * 0.707107 + 0.5); // -3dB from midpoint
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unsigned signal_threshold = (unsigned) (midpoint * 1.414214 + 0.5); // +3dB from midpoint
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#if 0
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fprintf(stderr, "f1f2 %u x1x2x3 %u midpoint %.0f noise_threshold %u signal_threshold %u\n",
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f1f2_signal, x1x2x3_noise, midpoint, noise_threshold, signal_threshold);
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fprintf(stderr, "f1 %u f2 %u x1 %u x2 %u x3 %u\n",
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f1_signal, f2_signal, x1_noise, x2_noise, x3_noise);
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#endif
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// recheck F/X bits just in case
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if (f1_signal < signal_threshold)
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continue;
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if (f2_signal < signal_threshold)
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continue;
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if (x1_noise > noise_threshold)
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continue;
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if (x2_noise > noise_threshold)
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continue;
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if (x3_noise > noise_threshold)
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continue;
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// Looks like a real signal. Demodulate all the bits.
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unsigned noisy_bits = 0;
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unsigned bits = 0;
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unsigned bit;
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unsigned clock;
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for (bit = 0, clock = f1_clock; bit < 24; ++bit, clock += 87) {
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unsigned sample = clock / 25;
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bits <<= 1;
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noisy_bits <<= 1;
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// check for excessive noise in the quiet period
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if (m[sample+2] >= signal_threshold) {
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//fprintf(stderr, "bit %u was not quiet (%u > %u)\n", bit, m[sample+2], signal_threshold);
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noisy_bits |= 1;
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continue;
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}
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// decide if this bit is on or off
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unsigned bit_signal = (m[sample+0] + m[sample+1]) / 2;
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if (bit_signal >= signal_threshold) {
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bits |= 1;
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} else if (bit_signal > noise_threshold) {
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/* not certain about this bit */
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//fprintf(stderr, "bit %u was uncertain (%u < %u < %u)\n", bit, noise_threshold, bit_signal, signal_threshold);
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noisy_bits |= 1;
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} else {
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/* this bit is off */
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}
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}
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#if 0
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fprintf(stderr, "bits: %06X noisy: %06X\n", bits, noisy_bits);
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unsigned j, sample;
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static const char *names[24] = {
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"F1", "C1", "A1", "C2",
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"A2", "C4", "A4", "X1",
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"B1", "D1", "B2", "D2",
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"B4", "D4", "F2", "X2",
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"X3", "SPI", "X4", "X5",
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"X6", "X7", "X8", "X9"
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};
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fprintf(stderr, "-1 ... %6u\n", m[f1_sample-1]);
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for (j = 0; j < 24; ++j) {
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clock = f1_clock + 87 * j;
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sample = clock / 25;
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fprintf(stderr, "%2u %-3s %6u %6u %6u %6u ", j, names[j], m[sample+0], m[sample+1], m[sample+2], m[sample+3]);
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if ((m[sample+0] + m[sample+1])/2 >= signal_threshold) {
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fprintf(stderr, "ON\n");
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} else if ((m[sample+0] + m[sample+1])/2 <= noise_threshold) {
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fprintf(stderr, "OFF\n");
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} else {
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fprintf(stderr, "UNCERTAIN\n");
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}
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}
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#endif
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if (noisy_bits) {
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/* XX debug */
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continue;
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}
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// framing bits must be on
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if ((bits & 0x800200) != 0x800200) {
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continue;
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}
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// quiet bits must be off
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if ((bits & 0x0101BF) != 0) {
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continue;
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}
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// Convert to the form that we use elsewhere:
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// 00 A4 A2 A1 00 B4 B2 B1 SPI C4 C2 C1 00 D4 D2 D1
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unsigned modeac =
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((bits & 0x400000) ? 0x0010 : 0) | // C1
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((bits & 0x200000) ? 0x1000 : 0) | // A1
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((bits & 0x100000) ? 0x0020 : 0) | // C2
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((bits & 0x080000) ? 0x2000 : 0) | // A2
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((bits & 0x040000) ? 0x0040 : 0) | // C4
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((bits & 0x020000) ? 0x4000 : 0) | // A4
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((bits & 0x008000) ? 0x0100 : 0) | // B1
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((bits & 0x004000) ? 0x0001 : 0) | // D1
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((bits & 0x002000) ? 0x0200 : 0) | // B2
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((bits & 0x001000) ? 0x0002 : 0) | // D2
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((bits & 0x000800) ? 0x0400 : 0) | // B4
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((bits & 0x000400) ? 0x0004 : 0) | // D4
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((bits & 0x000040) ? 0x0080 : 0); // SPI
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// This message looks good, submit it
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// compute message receive time as block-start-time + difference in the 12MHz clock
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mm.timestampMsg = mag->sampleTimestamp + f1_clock / 5; // 60MHz -> 12MHz
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mm.sysTimestampMsg = mag->sysTimestamp; // start of block time
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mm.sysTimestampMsg.tv_nsec += receiveclock_ns_elapsed(mag->sampleTimestamp, mm.timestampMsg);
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normalize_timespec(&mm.sysTimestampMsg);
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decodeModeAMessage(&mm, modeac);
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// Pass data to the next layer
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useModesMessage(&mm);
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f1_sample += (24*87 / 25);
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Modes.stats_current.demod_modeac++;
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}
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}
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@ -25,5 +25,6 @@
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struct mag_buf;
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void demodulate2400(struct mag_buf *mag);
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void demodulate2400AC(struct mag_buf *mag);
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#endif
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@ -1106,12 +1106,6 @@ int main(int argc, char **argv) {
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if (Modes.interactive) {signal(SIGWINCH, sigWinchCallback);}
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#endif
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if (Modes.mode_ac && Modes.oversample) {
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fprintf(stderr,
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"Warning: --modeac is currently ignored when --oversample is used;\n"
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" no ModeA/C messages will be decoded.\n");
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}
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// Initialization
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log_with_timestamp("%s %s starting up.", MODES_DUMP1090_VARIANT, MODES_DUMP1090_VERSION);
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modesInit();
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@ -1209,6 +1203,9 @@ int main(int argc, char **argv) {
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if (Modes.oversample) {
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demodulate2400(buf);
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if (Modes.mode_ac) {
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demodulate2400AC(buf);
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}
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} else {
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demodulate2000(buf);
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}
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